Average salary: Rs447,472 /yearly
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...Design Verification Manager
We need an experienced DV lead/manager to verify IP/SoC using System Verilog/UVM
Exposure to various interface... ...as well as a team player. Should have a strong sense of urgency.
Solutions orientation; Quality driven; Execution minded...
...Skill: Design Verification Lead Engineer Exp: 6+ Years
Location: Hyderabad
JD:
Test bench development and debug
UVM/C based test... ..., Verification reviews
Back-annotated netlist simulation execution and debug
Debug failing cases & Coverage improvements....
...and validate various sub-systems for the next generation ARA Processor series.
This is what you are responsible for
Develop verification environments for modules, subsystems, top level and FPGA
Build models, checkers and random test frameworks using SystemVerilog...
...Design Verification Engineer 5+ years of directly related industry experience in ASIC / SoC Verification - Expert knowledge in Object Oriented programming, data structures, and algorithms - In-depth knowledge of Digital Logic design techniques and principles. - Knowledge of...
...Design Verification Engineers at Semiconductor product MNC design center in Bengaluru / Hyderabad / Noida
We need experienced engineers... ...independently as well as a team player. Should have a strong sense of urgency.
Solutions orientation; Quality driven; Execution minded...
Role : DFT Engineer. Location : Pan India. Main Skills : DFT, RTL, Verification. Experience : 4+ Years.Payroll : Spruce IT Pvt Ltd. Notice Period : Immediate to 30 Days. Job Description :- Implementation tools like Mentor Tessent Fastscan, Testkompress or Synopsys DFT compiler...
...flows etc
3. Good experience with AXI protocol, NOC subsystem verification
4. Good SV-UVM knowledge with hands-on experience in... ...Solving approach
Managing Complexity
Client centricity
Execution excellence
Change agility
Passion for results
Deliver...
...Join us and build your future by being part of what’s next in electronics and the world.
Job Description
Lead or co-own verification at the SoC, Subsystem, or IP level for Automotive MCUs/SoCs
Own test content development and functional/code coverage closure...
...better decisions quicker on the most trusted hardware platform in today’s market.
Your Role and Responsibilities
As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers.
Leading the development of the...
...To be part of a highly skilled ASIC Team working on the newest technology nodes • Responsible for overall IP/Block and sub-system verification from test plan creation, SystemVerilog/UVM testbench development to signoff • Ensure first pass product through multi-dimensional verification...
...Title: Design Verification Engineer Duration: Full Time
Location: Hyderabad
Experience: 4
Description :
1.Experience in Verification of IP/SOC/Design
2.Experience in UVM/SV/ test bench development
3.Candidates with CPU-Core, Peripherals, Low Power Verification...
...information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
JR41599 Staff Engineer - Design Verification
~ Design Verification Engineer:
As a Digital or Mixed Signal Verification Engineer, you will work with a highly innovative...
...RESPONSIBILITES POSITION TITLE: Technical Lead – ASIC Design Verification
LOCATION: Hyderabad/Bangalore/Chennai/Ahmedabad
POSITION... ...team – and servicing clients in Project (ODC) based execution model as well as Staffing (Hyderabad Onsite requirements)....
...This position offers a wonderful opportunity to work on the most challenging technical problems in the verification domain and innovative technologies under Synopsys Verification Platform. Looking for an experienced and motivated professional who enjoys problem solving. Is...
...Hi ,
Excellent opportunity with Leadsoc Technologies on Design verification (Seniors/Leads/Managers)
About us:
LeadSoC Technologies offers cutting-edge Engineering Design services in VLSI and Embedded Systems. We have been growing rapidly over the last 5 years to...
Using spice simulation and digital simulation tools like Virtuoso, primesim, Finseim, Hspice, Xcellium, Simvision, Waveview. experience in co-sim simulation designs. cripting skills using perl, python. Good knowledge of Basic Analog/Digital concepts & Verilog/SV concepts
Position Title : Senior Engineer - ASIC Design Verification Location : Period : Immediate to 15 daysRole & Responsibilities :- An expert level... ...and quality metrics- The incumbent will be responsible for executing complete verification project in the role senior engineer with...
Role : SoC Verification EngineerExperience : 5 +yearsLocation : Bangalore/HyderabadNotice Period : Immediate (or) 30 DaysJob Description :- SOC Verification plan definition, DV environment development in SV/UVM- Design verification at RTL/Gate level, DV Coverage analysis, Coverage...
...improve lives.
Job Description
The position involves design verification of next generation modem sub systems (which has MAC, Baseband... ...development phase.
Responsibilities:
Develop and track execution of chip level test planning to meet product requirements and...
DESIGN VERIFICATION JOB SPECS We are hiring for below roles:Director of Design Verification : 10-20 yearsLead of Design Verification : 6+ years (2 positions)DV Engineer : 4+ years (4 positions)Technical Aspects :- Ability to clearly communicate across teams with multidisciplinary...