Search Results: 17 vacancies
...Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. EMIR (PDN) Signoff :
Minimum years of experience : 5 to 10 Yrs
Job Description :
IR Signoff for High Performance DSP Cores.
Signal...
...experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Job description:
As an IR/PDN Design automation engineer responsibilities would involve deploying new features/methodologies related to IR and IR-STA domain....
...beneficial.
Understanding sign-off PDV tools like PDK Concepts, SVRF, Calibre and ICV.
TCL/PERL Scripting is plus.
Hands on experience :Innovus/Fusion Compiler , Tech lef is preferable.
People management /Floorplanning/Power Planning/PDN experience is BIG Plus...
...understanding of PG-Grid optimization, including identification of high vs low current density paths & layer/via optimization, Adaptive PDN experience
• In-depth knowledge of custom clock tree including H-tree, SPINE, Multi-point CTS, and Clock metrics optimization through...
...STA flows
Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc
Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc
Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting
Principal Duties and responsibilities:
Complete...
...electronics design and analysis, SI methodology development, and lab correlation/validation of the simulation results
Experience working with PDN model extraction, simulation, and analysis
Possess strong fundamentals in 3D/2D EM simulation tools, such as: ADS, HFSS, SIWave,...
...flows such as Synthesis, Floorplan, Placement, CTS, Route/ECOs using industry standard tools.
Candidate must be proficient with STA, PDN, PDV, Logic ECOs and Chip Sign-off
Must be proficient on low power implementation techniques.
Strong communication skills (...
...signoff for high speed cores.
~ Should have good exposure to high frequency design convergence for physical design with PPA targets and PDN methodology.
~ Masters/Bachelors Degree in Electrical/Electronics science engineering with at least 7+ years of experience in IC...
...engineers to bringup and debug systems
~ Familiarity with signal integrity and power integrity concepts and tools, such as: impedance, PDN’s, differential routing, insertion loss, S-parameters, TDR’s, VNA’s
~ Experience with mass production Design for Manufactuability (...
...Physical Design and Optimization
Timing Closure and Signal Integrity
Clock Tree Synthesis (CTS) and Power Distribution Network (PDN)
Physical Verification, Formal Verification
Technology Node Migration
Multi-Voltage Design, Hierarchical Design, and IP Integration...
...(e.g., adaptive body biasing, adaptive clock distributions, level shifters, customized standard cells, specialized memory structures, PDN modeling etc.).
· Validate and refine low power circuit design techniques as part of a team that is building standard cells in advanced...
...signal propagation and interference analysis
LTE Architecture, Core understanding (Adding IMSIs, Wireshark capture on interfaces, Adding PDN routes)
Experience / Skill Required:
Exp – 3 to 7 yrs
LAN network
Basic knowledge on IP core network related to the 4G...
...methodologies.
# Power Optimization: Experience with power optimization techniques, power grid design, power distribution network (PDN) analysis, and low-power design methodologies.
# Physical Verification: Knowledge of physical verification methodologies, DRC/LVS/ERC...
...Graphics / Altium
# Experience of interaction with PCB fabrication house and assembly house for hardware build.
# Design analysis for SI, PDN, Thermal, EMI/EMC
# Product qualification / Compliances test experiences .
Skills Required : Hardware Board Design, High Speed...
...Mentor Graphics
Experience of interaction with PCB fabrication house and assembly house for hardware build.
Design analysis for SI, PDN, Thermal, EMI/EMC.
Experience in quality product release to customers.
Technical Management Skills:
Technical management with...
...implementation flows such as Synthesis, Floorplan, Placement, CTS, Route/ECOs using industry standard tools.
Familiarity with STA, PDN, PDV, Logic ECOs and Chip Sign-off is a plus
Must be cognizant about low power implementation techniques.
Can – do attitude; openness...
...and optimize clock distribution networks to achieve low skew, high frequency, and low power consumption.
# Power Distribution Network (PDN): Design and optimize power grids to deliver clean and stable power to IC components while minimizing IR drop and voltage noise.
#...
