PCB High-Speed Design Engineer (Allegro / Altium / Server Board Design)

PCB High-Speed Design Engineer (Allegro / Altium / Server Board Design)

Start Date

Starts  Immediately

CTC (ANNUAL)

Competitive salary Competitive salary

Experience

3 year(s)

3 year(s)

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About the job

Job Title: PCB High-Speed Design Engineer (Allegro / Altium / Server Board Design)

Location Bangalore/Chennai

Venue : Cafeteria 1, Tower 4 (Reception Area).

Exp 3-7 Years

Employment Type Full-time

Job Summary

We are seeking an experienced PCB High-Speed Design Engineer to join our hardware engineering team. The ideal candidate will be responsible for the design and development of complex multilayer PCBs for high-performance server and computing platforms. The role requires strong expertise in Cadence Allegro, Altium Designer , high-speed digital design, signal integrity, power integrity, and server motherboard design.

Key Responsibilities

• Design and develop complex multilayer (36 Layers Board) PCBs for server and enterprise hardware platforms.
• Perform schematic analysis and PCB layout using Cadence Allegro and Altium Designer .
• Design high-speed interfaces such as:
• PCIe Gen4/Gen5/Gen6
• DDR4/DDR5
• USB 3.x / USB4
• Ethernet (10G/25G/40G/100G)
• SATA, SAS
• MIPI, LVDS, SerDes
• Define PCB stack-ups and routing strategies for high-speed designs.
• Perform Signal Integrity (SI) and Power Integrity (PI) analysis.
• Collaborate with hardware, FPGA, mechanical, and manufacturing teams throughout the product development lifecycle.
• Generate fabrication, assembly, and manufacturing documentation.
• Support prototype bring-up, validation, debugging, and root cause analysis.
• Work closely with PCB fabrication vendors and assembly partners to ensure manufacturability and quality.
• Drive DFM, DFA, and DFT reviews.

Required Skills

• Strong experience in Cadence Allegro PCB Designer and/or Altium Designer .
• Hands-on experience in Server Board Design and high-speed digital systems.
• Expertise in PCB layout techniques for high-speed interfaces.
• Good understanding of:
• Signal Integrity (SI)
• Power Integrity (PI)
• Multi lamination
• HD technology
• laser micro vias
• Back drill technology, embedded cap, constraint driven layout design.
• EMC/EMI compliance
• PCB stack-up design
• Controlled impedance routing
• Experience with multilayer boards.
• Strong understanding of DDR memory routing and timing constraints.
• Knowledge of server architectures based on Intel and AMD platforms.
• Familiarity with PCB fabrication and assembly processes.

Preferred Qualifications

• Bachelor's or Master's degree in Electronics, Electrical Engineering, or related field.
• Experience working with enterprise servers, storage systems, networking products, or data center hardware.
• Exposure to SI/PI tools such as HyperLynx, Sigrity, ADS, or equivalent.
• Knowledge of thermal and mechanical considerations in server board design.
• Experience with design review and hardware validation activities.
• Having Good Communication Skills & able to work on Flexible Timings

Nice to Have

• Experience with OCP/Open Compute platforms.
• Exposure to AI/ML accelerator boards and high-performance computing systems.
• Understanding of compliance standards such as CE, FCC, UL, and RoHS.

Why Join Us?

• Work on cutting-edge server and data center technologies.
• Collaborate with world-class hardware engineering teams.
• Opportunity to contribute to next-generation high-performance computing platforms.

Interested Candidates can apply to the job

Keywords: PCB Design, High-Speed PCB, Allegro PCB Designer, Altium Designer, Server Motherboard Design, DDR5, PCIe Gen5, Signal Integrity, Power Integrity, Hardware Design, Enterprise Servers, Data Center Hardware.

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Who can apply

Only those candidates can apply who:

1. have minimum 3 years of experience

Salary

Probation:

Duration:

Salary during probation:

After probation:

Annual CTC: Competitive salary

Number of openings

1

Editor’s note

Information above is Internshala's interpretation and paraphrasing of what we found on the shared link.

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