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- ...of issues up to and including design and tool/flow/methodology used in analog layout design .Should have good experience working in TSMC N3 technology . Qualificatio nsBachelor's/Master's degree in Electrical Engineering, Computer Engineering, or a related disciplin...Suggested
Altera
Bangalore7 days ago - ...solutions through to completion. Familiarity with timing and power ECO techniques and implementation is a plus Familiarity with TSMC based designs will be an added plus Leading IP delivery project will be a additional plus About Micron Technology, Inc. We are...SuggestedImmediate start
Micron Technology
Secunderabad24 days ago - ...nodes with minimal supervision. Required Skills & Experience Strong hands-on experience in advanced process nodes such as: TSMC 16nm / 12nm / 7nm / 5nm / 3nm or below Experience with Intel, Samsung, or GlobalFoundries nodes is also acceptable. Preferably...SuggestedFull time
Scaledge Technology
Secunderabad2 days ago - ...Would Include Building of regression test cases for several PDKs of various process technologies Supporting 4nm to 600nm PDKs from TSMC, Global Foundries, Vanguard, Dongbu, Magnachip, etc. Calibre/Pegasus PERC – several PDKs still require PERC setup. Requirements/...SuggestedRemote jobWorldwide
Microchip Technology Inc.
Chennai22 days ago - ...results. Networks with key contacts outside own area of expertise. Supervision: Determines methods and procedures on new assignments and may coordinate activities of other personnel (Team Lead). Experience with Cadence tools and TSMC processes are preferred R024921...Suggested
Broadcom
Bangalore24 days ago - ...ICV/Calibre, gives you the practical skills needed to deliver high-quality layouts. You have worked with multiple foundries including TSMC, Samsung, UMC, and GlobalFoundries, and understand the nuances of their PDKs. Proficiency in scripting languages like Unix/Shell, Python...SuggestedFull timeRemote jobWorldwide
- ...optimal designs o Generate post-layout extraction o Create layout related documentation and conduct layout reviews Preferably experience in TSMC, Finfet, SERDES/ADC/DAC/PLL - good to have but not mandatory. - Strong understanding of layout design tools and methodologies. -...SuggestedFull timeWork at officeImmediate start
Accenture services Pvt Ltd
Bangalore23 days ago - ...Job Title:Analog Layout Engineer – Advanced / Lower Nodes (TSMC) Experience:4 -7 Years Location: Hyderabad (F2F) Job Summary We are seeking an experienced Analog Layout Engineer to design and implement high-performance analog and mixed-signal IC layouts in advanced...SuggestedFull time
SysTechCorp Inc
Secunderabad24 days ago - ...Experienced SRAM Circuit Design Engineer with indepth knowledge in circuit design basics. Experienced in Advanced Technology nodes like TSMC 7nm and below. Advanced knowledge in Timing and Power Characterization methodologies. Strong experience across multiple...Suggested
AMD
Secunderabad24 days ago - ...layout tools, and a passion for solving challenging technical problems. Key Responsibilities: Develop and optimize MSIP IC layouts in TSMC 3nm, ensuring high performance and manufacturability. Collaborate with design engineers to understand design requirements and...SuggestedFull time
- ...Responsibilites: Design and implement analog layouts for high-performance circuits (e.g., amplifiers, ADCs, DACs, voltage regulators) using TSMC 3nm and 5nm nodes. Perform design rule checks (DRC), layout versus schematic (LVS), and electrical rule checks (ERC) to ensure...SuggestedImmediate start
ACL Digital
Bangalore4 days ago - ...characterization and optimization of flow for performance-oriented and power-oriented best-in-class IP cores in advanced process nodes, on TSMC, Intel, Samsung and Rapidus Foundries Manage regression infrastructure that tracks quality of the RTL/flow development as well as...Suggested
Cadence
Pune6 days ago - ...Fusion Compiler to understand physical implementation gaps. Technical Knowledge: Deep understanding of Foundry Design Manuals (TSMC, Samsung, or Intel Foundry). Solid grasp of semiconductor physics, CMOS layout, and parasitic extraction (PEX). Knowledge of...SuggestedFull timeImmediate start
ACL Digital
Secunderabad12 days ago - ...Verification closure role in the past Strong understanding of DRC/LVS/PERC/Antenna/DFM and associated concepts for advanced nodes on TSMC and Samsung foundries Needs to run Physical Verification on Arm CPU designs on advanced technology nodes Needs to run fixing for...SuggestedImmediate start
ACL Digital
Bangalore22 days ago Rs 2 - 7 lakhs p.a.
...of solid experience. FinFET Layout Expertise: Proven expertise in working on FinFET layouts in lower nodes, with a preference for TSMC 7nm and below. Tool Proficiency: Expertise in using the best and latest features of Cadence VXL and Calibre DRC/LVS . Layout...SuggestedQualcomm
Bangalore4 days ago- ...Experienced Layout Engineer Minumum 4+ years of Experience for Bangalore Location Good to have ESD Blocks Must have Lower nodes from TSMC AMS/IO Memory - Layout Interested share/refer [HIDDEN TEXT] Bachelor's or Master's Degree with 4 - 12 years of Analog...Full timeFlexible hours
ACL Digital
Bangalore22 days ago - ...NIC (Altera NIC), Palm Ridge, Mount Morgan IPU SoCs which are executed in advanced technology nodes of both Intel (18A, 3nm, 5nm) and TSMC (N3e, N5, N6).- Have hands on experience in chiplets, Sub-systems and IP development (micro-architecture development, 3rd party IP integration...
- ...Skills: • Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support • TSMC 3nm Exp – MANDATORY • custom layout or analog layout with TSMC 3nm/5nm7nm/16nm Finfet & 5+ exp Responsibilities: •...Full timeLocal areaImmediate start
Anubudh
Secunderabad4 days ago - ...Electrical Engineering , Computer Engineering , or a related field. ~4+ years of experience in analog layout design with a focus on TSMC 7nm , 5nm , and 3nm process technologies. ~ Proficiency with Cadence Virtuoso , Mentor Graphics , Synopsys IC Compiler , or...Full time
ACL Digital
Bangalore22 days ago - ...behavior, transistor-level device physics, and PPA trade-offs, with emphasis on variability and layout challenges at advanced nodes ( tsmc 3nm, Samsung 4nm and below). Expertise in transistor-level design of static circuits, including state-retaining elements such as latches...Immediate start
Digicomm Semiconductor
Bangalore22 days ago - ...understand timing limitations and optimize component design based on these requirements Experience In designing IP in leading edge TSMC and or Intel nodes Experience in designing clock/power controls Good understanding of MMU design Experience with Jinja-based templatingIn...Hybrid workLocal areaShift work
Intel
Bangalore11 days ago Rs 2.5 - 8 lakhs p.a.
...designs o Generate post-layout extraction o Create layout related documentation and conduct layout reviews Preferably experience in TSMC, Finfet, SERDES/ADC/DAC/PLL - good to have but not mandatory. - Strong understanding of layout design tools and methodologies. -...Full timeWork at officeSigma Allied Services Private Limited
Bangalorea month ago
