Average salary: Rs64,530 /yearly
More stats ...Work Experience in Synthesis Constraints development, LINT checks, CDC checks
Experience in working/leading full-chip STA closure, defining mode requirements and corners for timing closure.
Experience in Formal Verification with Synopsys Formality and / or Cadence Conformal...
...and timing analysis, Coming with better QoR
Sign-off flow :: STA, DRC/LVS/Antenna/ERC, Power analysis, IR/EM analysis, LEC, ECO (Timing... ...process nodes
Hands on scripting skills on TCL / Perl
Synthesis:
Good Experience in RTL Codes.
Should have understanding...
...focus of this role is to plan and execute the front end implementation of IPs and its closure. This involves ownership of synthesis, LEC, CLP, prelayout STA and postlayout STA/Timing closure. Co-ordinate with design team and PNR teams. Guide team members on tenchical issues....
..., and provide feedback on design feasibility, timing and power .
Write and implement block level and top-level constraints for synthesis,perform timing closure and power analysis.
Develop and implement synthesis flows and methodologies, and driveimprovements in the...
...Title: STA/Synthesis Engineer Location: Bengaluru or Hyderabad
Description:
1. Performing Timing closure of partitions at SoC level
2. Providing placement feedback with respect to timing
3. Reduction of clock ID, by analyzing necessary tap points
4. Providing clock...
...Limited Job Area: Engineering Group, Engineering Group Hardware Engineering General Summary:
Qualcomm Chennai is looking for a STA and Synthesis Engineer who is passionate in to work with cross-functional engineering teams. In this position, the engineer will be involved...
~ 5-12 years of experience in ASIC Physical synthesis/STA
~ Expertise in Synopsys/Cadence Synthesis tools
~ Expertise with STA with prime time/Tempus.
~ Good Experience in synthesis timing closure and interactions with DFT and PD.
~ Expertise in Low power flows...
...Job Area:
Engineering Group, Engineering Group Hardware Engineering
General Summary:
Qualcomm Chennai is looking for a STA and Synthesis Engineer who is passionate in to work with cross-functional engineering teams. In this position, the engineer will be involved in...
...Skills required
• 5+ years of experience in Digital Implementation flow on advanced nodes
• Expertise in one or more domains – Synthesis/PnR/STA
• Knowledge of scripting languages & Flow development is a big plus
• Must have excellent debugging skills and ability to...
...Mirafra Technologies Hiring STA Lead Engineers
Experience: 6 - 15 years
Notice period - 0 to 30 days
Location - Bangalore
Skills: STA, Prime Time, Timing CLosure
JD:
~7+ years of experience in STA.
~ Well-versed with the timing closure (STA), timing closure...
...is responsible for a Timing Convergence (STA).
The individual is responsible from writing... ...with backend functions such as synthesis and PNR team for delivering constraints and... ...and tools.
The candidate is expected to lead the STA team at block level analysis and top...
...4-8 years of experience in ASIC synthesis
Expertise in Synopsys/Cadence Synthesis tools : DC /FC/ Genus
Expertise with STA with Prime Time :
Good Experience in synthesis timing... ...in close collaboration with Multi-site leads
Developing the micro architecture and implementing...
...life cutting-edge designs. As a member and lead of the Backend Full Chip Timing team, you... ...leads, IP teams, Physical Design leads and PD/STA engineers to achieve first-pass silicon... ...across Physical Design, Timing Analysis, Synthesis, Physical Verification, Power signoff, and...
...STA Engineers:
Location: Bangalore/Hyderabad/Pune/Noida
Responsibilities
~·Ability to work with RTL design team to identify... ...handling,
· Hands on experience on constraint development for synthesis from scratch is a plus
Knowledge of ASIC back-end design flows...
B. Tech. / M. Tech. with 5- 8 years of experience in Synthesis, STA
Expertise in synthesis of complex SoCs at block/ top level and writing timing constraints for complex designs with multiple clocks and multiple voltage domains
Expertise on post layout timing closure for...
...standard EDA tools (Primetime, Tempus) and ASIC design flow is required Multi-voltage scenarios design handling knowledge is expected. STA closure/convergence execution on Low power designs is an added advantage. Hands-on experience with Physical Design implementation is a...
...A "Full Chip STA Lead" is a key role in semiconductor companies, responsible for leading Static Timing Analysis (STA) activities for complex... ...understanding of setup and hold time violations, clock tree synthesis (CTS), and optimization techniques.
# CDC and SI Analysis: Experience...
..., inspiring the world to learn, communicate and advance faster than ever.
JR39126 MTS - ASIC STA
Skills Required :
~12-20 years of relevant experience in Synthesis/STA
~ Good understanding of overall design Flow RTL to GDS.
~ Experience on signing off the full...
1) Staff Engineer - STA / Synthesis
Job Description
• Must have at least 5+years of experience, out of which at least 4 years should be related to STA/Synthesis.
• Must have Involved in high Speed design tape-outs and constraint development across modes.
• Must have...
...Job Title: STA Engineer
Skills Required
· 3-10 years of relevant experience in Synthesis/STA
· Good knowledge and understanding of overall design Flow RTL to GDS.
· Hands on Experience on Constraints Generation, Management for hierarchical designs.
· Thorough Knowledge...
...Job Description Job title: Lead STA Engineer
Experience: 7-10 years
Primary Responsibilities:
The STA and Methodology Engineer... ...Knowledge and working experience in Timing Analysis (Synthesis, STA, CTS, ECO etc.) Also understanding and experience with: STA...
...Engineering Group Hardware Engineering General Summary:
As a leading technology innovator, Qualcomm pushes the boundaries of what's... ...Hardware Engineering or related work experience. Responsibilities:
STA setup, convergence, reviews and signoff for multi-mode, multi-...
...require your unique skills. It's You & Western Digital. Together, we're the next BIG thing in data.
Job Description
Job-Title: STA/Synthesis Lead
Responsibilities
In this position, the individual will be responsible for complete ownership of full chip Synthesis /STA...
...tools and flows will ensure our custom Oryon CPUs have industry-leading power, performance and area.
Roles andResponsibilities
Develop... ..., integrate and release new features in our high-performance synthesis CAD flow
Architect and recommend methodology improvements to...
...strong in design micro-architecture & RTL coding (System Verilog or Verilog or VHDL). Other requirements are :
Exposure to synthesis & STA
Low power and high speed design awareness
Knowledge on design flow, industry standard frond end tools flows ( lint, cdc, etc...
Exp: 3-6 yrs
Education: BE/ B Tech/ ME/ M Tech / MS B.Tech/BE/ME/Mtech
Hands-on experience STA , timing closure and IR-EM/Power sign off.
Working knowledge of place and route.
Exp with ASIC design flow, hierarchical physical design strategies, methodologies and...
...process technology nodes is strongly preferred.
Experience with STA on large SOC with multi-scenario timing closure.
Experience... ...corner selection.
Solid understanding industry standard tools for synthesis, place & route and tapeout flows.
Good communication skills to...
...Closure of high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced... ...D, Marketing and Sales.
Key Qualifications
Deep Synopsys STA tool, PrimeTime or PNR tool ICC2/FC experience and knowledge are...
3+ years experience Synthesis and STA Engineers
Experience with power analysis using power artist and PTPX
Experience with sign off static timing analysis, static low power checks, logic equivalency checks
Static timing analysis and ECO flows and achieve timing closure...
RTL Synthesis & Data Analyst- Should have at least 8 years of experience in RTL design/integration, synthesis and static timing analysis- Should have a good knowledge of industry leading synthesis and STA tools. Should have prior working experience at both IP and full-chip levels...