Get new jobs by email

  • Frond End Design- STA Engineer

     ...Role In this role, you will be responsible for driving low-power design strategies, synthesis, and timing closure for complex SoC and IP...  ...across SoC/IP design. Perform synthesis and static timing analysis (STA) to achieve PPA targets. Analyze and optimize dynamic and... 
    Suggested

    AMD

    Bangalore
    10 days ago

  • STA Design Engineers

     ...JD STA, Timing Closure is must We are looking for profiles, with some PD experience, like Placement and Routing (PnR), Static Timing...  ...with TCL scripting with 1+ years of experience along with FPGA Design. • BS or MS in EE or CE with 2+ years of experience in digital... 
    Suggested

    Mirafra Technologies

    Noida
    2 days ago

  • Senior ASIC Design and STA Engineer

     ...impact on the world! NVIDIA is looking for a best-in-class ASIC STA Engineer to join our outstanding Networking Silicon engineering team,...  ...latency for today's AI platforms! Come and take a part in designing our groundbreaking large scale and innovating chips, enjoy working... 
    Suggested
    Full time
    Hybrid work
    Worldwide

    Nvidia

    Bangalore
    2 days ago

  • Sr Physical design STA Lead - Timing analysis, Primetime

     ...as we shape the future of AI and beyond. Together, we advance your career. MTS SILICON DESIGN ENGINEER     The Role AMD is seeking an experienced **Static Timing Analysis (STA) Lead** to join our high-performance Cores team. This role will be responsible for... 
    Suggested

    AMD

    Bangalore
    a month ago

  • Staff Verification Engineer STA Core die

     ...wise , top level analysis , cell level analysis Writing constraints , analyzing the STA reports Circuit understanding block wise , Full chip level Reporting violations to Design team , ownership for closure Parasitic modeling and assisting in design validation,... 
    Suggested
    Full time
    Immediate start

    Micron Technology

    Secunderabad
    13 days ago

  • Design Lead Engineer Mid Senior

     ...Job Title: Design Lead Engineer Mid Senior (ASIC / SoC – RTL) Experience: 6–8 Years Location: Bengaluru Employment Type: Full-time...  ...RTL quality checks including lint, CDC, synthesis support, and STA collaboration Optimize designs for Power, Performance, and... 
    Suggested
    Full time

    Best NanoTech

    Bangalore
    2 days ago

  • Low Power Design Engineer (Synthesis)

     ...and beyond. Together, we advance your career. SENIOR SILICON DESIGN ENGINEER The Role This position for a CAD Engineer will be...  ...Compiler, ICC2 and Innovus. Hands on experience in any of PnR, STA or Formal Verification domains is a plus. Knowledge of scripting... 
    Suggested

    AMD

    Secunderabad
    a month ago

  • Principal Design Engineer

     ...and innovative person to lead the Frontend design of complex semiconductor products in Auto...  ...driving technical excellence, mentoring junior engineers, and contributing significantly to the...  ...and additionally static timing analysis (STA), formal verification, and power analysis... 
    Suggested

    NXP Semiconductors

    Noida
    13 days ago

  • Principal Design Engineer

     ...an impact on the world of technology. Job Title : Principal Design Engineer Location: Bangalore Cadence is a pivotal leader in...  ...to RTL2GDS flow and tasks such as synthesis and scan insertion, STA and IR drop. .Good understanding of Logic design, RTL... 
    Suggested

    Cadence Design Systems (India) Pvt Ltd

    Bangalore
    19 days ago

  • FPGA Design Engineer

     ...Location: Hyderabad/Banglaore Job Title:FPGA Engineer Required skill for the Job:• Basic STA knowledge along with tools like Vivado. • Experience...  ...AMD(XILINX)/Altera. • Expertise in digital hardware designing using Verilog on large AMD(Xilinx)/altera FPGAs • Experience... 
    Suggested

    ACL Digital

    Secunderabad
    2 days ago

  • Manager - Design Engineering

     ...Tessolve offers a Turnkey ASIC Solution, from design to packaged parts. Tessolve's design...  ...and Medical segments. Tessolve's Embedded Engineering services enable customers a faster time-to...  ...Who You Are Experienced in synthesis, STA, and ASIC design methodologies. Proficient... 
    Suggested
    Full time
    Work at office
    Worldwide

    Tessolve

    Bangalore
    2 days ago

  • Lead STA (Timing, Constrains)/CAD experience engineer

     ...beyond. Together, we advance your career. MTS SILICON DESIGN ENGINEER The goal of AMD CAD is to determine a set of best...  ...Bachelor's degree in Electrical or Computer Engineering and 8+ years STA (Timing, Constrains)/CAD experience or Master's degree and 6+... 
    Suggested
    Full time

    Xilinx

    India
    19 days ago

  • Senior Staff Design Verification Engineer

     ...from scratch and ensure Spec Compliance. Design and develop verification systems,...  ...Mentor and train digital verification engineers All other tasks as deemed reasonable by...  ...block and top-level timing constraints for STA and P & R sign off Knowledge of scan insertion... 
    Suggested
    Full time
    Hybrid work
    Work at office
    Remote job
    Worldwide
    Flexible hours
    2 days week

    Renesas Electronics

    Bangalore
    2 days ago

  • RTL Design Engineer

     ...We HCL are seeking a highly motivated RTL Design Engineer with 7-12 years of experience to join our growing team. You will play a vital role...  ...standard methodologies (e.g., UVM) Conduct static timing analysis (STA) and participate in timing closure activities Integrate... 
    Suggested

    HCLTech

    Secunderabad
    10 days ago

  • RTL Design Engineer

     ...Semiconductor is a fabless semiconductor design company headquartered in Bengaluru, driving...  ...generation communication technologies, Axiro is engineering the future of how the world connects,...  ..., constraints, formal verification, DFT, STA, and verification. Proficient in digital... 
    Suggested

    Axiro Semiconductor

    Bangalore
    2 days ago

  • Design Engineer II

     ...and develop leaders and innovators who want to make an impact on the world of technology. STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs Timing analysis, validation and debug across multiple PVT conditions Run Tempus for STA... 

    Cadence

    Pune
    2 days ago

  • Silicon Design Engineer

     .... Join us as we shape the future of AI and beyond. Together, we advance your career. MTS SILICON DESIGN ENGINEER The Role ~ As a member of the PD Full Chip STA closure and optimization team, you will work on SoC Full Chip Timing closure which includes high frequency... 
    Full time

    AMD

    Bangalore
    17 days ago

  • RTL Design Engineer

     ...Should have good understanding of SoC flows. Primary Skills ~ VHDL, Verilog, Micro-architecture, RTL coding, CDC, Lint, Synthesis, STA, IP development, SoC integration, VCLP, scripting - Perl, Python, Shell, and Tcl. Secondary Skills ~ Synopsis/Cadence tool flow,... 

    Capgemini Engineering

    Bangalore
    10 days ago

  • Sr Principal Design Engineer

     ...building and leading a high-performance IC design team, owning the IC micro-architecture,...  ...Proficiency in logic design, simulation, synthesis, STA and testing Proficiency in Verilog and...  ...of applicable experience in electrical engineering, microelectronics, comparable engineering... 

    Cadence Design Systems (India) Pvt Ltd

    Bangalore
    19 days ago

  • Sr RTL Design Engineer

     ...Alternate Job Titles: Senior RTL Design Engineer IP RTL Engineer – PVT Sensors ASIC Design Engineer – RTL & Microarchitecture SoC...  ...Intent. ~ Proficiency in synthesis and static timing analysis (STA) using DC/Genus and PrimeTime/Tempus; LEC sign-off using... 

    Synopsys Inc

    Bhubaneswar
    10 days ago

  • Sr. Design Engineer 2

     ...micro-architecture specifications based on system requirements. Design and implement RTL using Verilog/SystemVerilog. Perform RTL...  ...solutions. Perform block-level and SoC-level integration. Support STA, DFT, and physical design teams during implementation. Analyze... 

    Tessolve

    Bangalore
    2 days ago

  • Senior RTL design engineer - SOC Intergration

     ...and beyond. Together, we advance your career. MTS SILICON DESIGN ENGINEER     ~ THE ROLE: We are looking for an adaptive, self-motivative...  ...with RTL design in Verilog/SystemVerilog Circuit timing/STA, and practical experience with PrimeTime or equivalent tools... 

    AMD Ventures

    Secunderabad
    1 day ago

  • Senior Design Engineers

    STA Engineer Experience : 4-5 years Location : Bangalore Timing closure fundamentals Constraint creation and maintenance exposure DFT modes in STA timing closure Interested,please drop your updated resume to [HIDDEN TEXT]

    ACL Digital

    Bangalore
    10 days ago

  • Sr. Silicon Design Engineer

     ...Together, we advance your career. SENIOR Synthesis and STA ENGINEER THE ROLE: The focus of this role is to plan and...  ...prelayout STA and postlayout STA/Timing closure. Co-ordinate with design team and PNR teams. Guide team members on technical issues.... 

    Xilinx

    India
    18 days ago

  • Senior RTL Design Engineer

     ...Senior RTL Design Engineer Location: Bengaluru/Hyderabad Experience: 5+ Years Role Overview We are looking for an RTL Design Engineer...  ...analysis and constraints . Experience with synthesis and STA flows . Knowledge of AMBA protocols (AXI/AHB) . Prior... 
    Flexible hours

    Silicon Patterns

    Bangalore
    3 days ago

  • Senior Design Engineer

    • Synthesis and STA Engineers • Experience with power analysis using power artist and PTPX • Experience with sign off static timing analysis, static low power checks, logic equivalency checks • Static timing analysis and ECO flows and achieve timing closure

    Insemi Technology Services Pvt. Ltd.

    Bangalore
    3 days ago

  • Lead Design Engineer

     ...Lead Design Engineer As an RTL Design Lead , you will play a critical role in leading the RTL design and verification process for complex...  ...Strong knowledge of timing analysis , static timing analysis (STA) , and power optimization techniques . ~ Excellent problem-... 

    ACL Digital

    Bangalore
    2 days ago

  • Lead Design Engineer

     ...world of technology. Responsibilities: - Design and integration of IPs in SoC based on...  ...4-7 years of experience as digital design engineer. - Good knowledge of digital design fundametals...  ...of creating synthesis constraints and STA. Knowledge of synthesis tool is a plus.... 

    Cadence Design Systems (India) Pvt Ltd

    Bangalore
    19 days ago

  • Lead RTL Design Engineer

     ...beyond. Together, we advance your career. MTS SILICON DESIGN ENGINEER THE ROLE: The focus of this role is to plan, build,...  ...architecture including buses like AXI/AHB, bridges Circuit timing/STA, and practical experience with tools Working knowledge of C... 
    Full time

    Xilinx

    Secunderabad
    19 days ago

  • Lead Design Engineer

     ...technology. IP Integration and release Engineer for SSG IP Release engineering team....  ...regressions, supportingcustomers, ensuring design is clean for LINT and CDC design guidelines...  ...Lint/CDC/Synthesis (preferably with Genus)/STA. Ability to debug and setup new flows.... 

    Cadence Design Systems (India) Pvt Ltd

    Bangalore
    19 days ago