Average salary: Rs230,000 /yearly
More statsSearch Results: 12,471 vacancies
...About us:
LeadSoC Technologies offers cutting-edge Engineering Design services in VLSI and Embedded Systems. We have been growing rapidly... ...to meet the evolving needs of the Semiconductor,
Skill: RTL (ASIC/FPGA)
Exp: 4+ Yrs
Location: Bangalore/Hyderabad.
If...
Company:MNC (Direct Payroll)
Location :Hyderabad
Experience-4 to 7years
Role:RTL Design Engineer
Strong in digital design.
Strong in Xilinx Vivado IP & IPI tools till bit-generation.
Knowledge of VHDL/Verilog/System Verilog.
Lint/CDC/Timing Closure
Knowledge...
...RTL Design Engineers at Hyderabad
We need experienced engineers to work on cutting edge technology and with complex functionality.
Skills:
Overall 3+ years industry experience with 2+ years in RTL Design and SoC Integration.
Proven hands-on experience with RTL...
...Power optimizations, Linting, Static Timing Analysis (STA)
Write design specifications for different functional blocks on a chip, Create... ...functional blocks, Design functional blocks using System Verilog RTL code, conduct Synthesis and place and route to meet timing / area...
...ASIC RTL Design Lead (ONLY IMMEDIATE JOINERS) Job Location : Bangalore, Hyderabad, Pune, Noida, Ahmedabad, Chennai
~12-15 years of experience in ASIC design and SoC integration
~ Good knowledge of PCIe, HBM, and Processor subsystem integration
~ Lint, CDC
~ Constraint...
...Memory based product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic circuits
Responsible... ...discipline
Proven knowledge of CMOS Circuit Design
Experience in RTL design, design synthesis, static timing analysis, and automated...
Role : RTL Design LeadLocation : Bangalore, Hyderabad, Chennai, Ahmadabad, Pune.Experience : 10-15 YearsMust Haves :- 10-15 years of proven experience in ASIC design and SoC integration.- Knowledge in linting and CDC analysis.- Good knowledge of PCIe, HBM, and Processor subsystem...
...of IP from various sources provided by customer
Partition the design per PD guidelines into tiles of no more than 3m instances Insert DFX... ...level
Mandatory Skills
Microarchitecture,Building Architecture,Clock Domain Crossing (CDC),RTL Design,Linting (Inactive),Verilog
RTL Design Engineer
Exp- 4+ years,
Location -Hyderabad_Onsite Malayasia
Joining Time- 30days, • Basic knowledge of design metrics, Lint, CDC, RDC is needed
• Basic design knowledge of digital building blocks like FIFO, Arbiter, DMA, Clock Crossing and knowledge of...
Company:MNC(Direct Payroll)
Job Title
:
RTL Design Engineer
Job Description
:
Strong in digital design.
Strong in Xilinx Vivado IP & IPI tools till bit-generation.
Knowledge of VHDL/Verilog/System Verilog.
Lint/CDC/Timing Closure
Knowledge of Validating...
...information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
JR46611 STAFF ENGINEER, ASIC RTL DESIGN
BS/MS in E&E or related field with 10+ years of experience.
Proven hands-on experience with IP & SOC RTL design.
Experience...
Responsibilities :
Be a technical digital design lead for sub-system
Own the design and work with cross functional teams (IP designers... ...Guide verification team on verification plan and code coverage
RTL quality checks – Lint, CDC, synthesis readiness
Own the...
...Job Title: RTL Design Engineer
Location: Hyderabad
Duration: Full Time
Job description
• 5+ years of experience in front end RTL design and front-end tools and flows
• Experience in SOC integration, RTL release flows, clocking and reset architecture.
• Experience...
• Sound knowledge of RTL/SOC design/integration with Verilog/system Verilog
• Strong experience in Synthesis, timing, full chip netlist & front-end design tools& flows
• ow power design.
• Mentoring juniors and enhancing their skill set
• Must have strong knowledge of...
...devices.
Experience in wireless communication, Proficient in Verilog RTL language.
Experienced with large FPGA development on Xilinx devices.
Very familiar with Xilinx's build flow including design entry in Verilog, synthesis, place and route, timing constraints and...
...of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
JR48491 Staff Design Engineer - RTL Firmware (Evergreen)
Responsibilities will include, but are not limited to:
Contributing to the development of new product...
...devices to serve the IoT wireless market. A member of the digital design team developing innovative low power blocks and chip infrastructure... ...and production.
Skills you’ll need:
Required
Verilog RTL design with demonstrated experience of taking designs through the...
...processes to provide the best talent to its client in timely fashion in Design Verification, Design For Test and Physical DesignThey are looking... ...have in-depth knowledge of entire physical design process from RTL to GDSII generation which includes Floorplan, Placement, CTS,...
...diverse perspectives.
AMD together we advance_
SENIOR SILICON DESIGN ENGINEER
The Role
We are looking for an adaptive, self-... ...relevant experience in IP design
Candidate should be having strong RTL design experience
Understanding and experience in design of Ethernet...
...diverse perspectives.
AMD together we advance_
SE NIOR SILICON DESIGN ENGINEER
THE ROLE :
We are looking for an adaptive, self... ...on problems.
KEY RESPONSIBILITIES:
Drive energy efficient RTL design and micro-architecture of AI/ML silicon
Develop power...
