Average salary: Rs1,034,999 /yearly
More stats ...Minimum 3-5 + years Experience in Physical Design engineering Experience serving as Senior physical design engineer or SOC or block coordinator or top level integrator in TSMC 12m or 16nm process and beyond required
Experience running Synthesis-to-GDS ready flows, advanced...
...Quest Gobal is looking to hire for expertise physical design engineer, experience with Innovus tools,PNR.
Location:: Bangalore,India
Job Description ::
~5+ years industry experience required
~ Experience with Hierarchical design is a plus
~ Experience with ICC...
Hi,
Greetings from Leadsoc Technologies!!
We are hiring physical Design Engineers for Bangalore Location
Experience: 4-9yrs
Location: Bangalore(work from office)
Interested people can share CV to ****@*****.***
Regards
Ramya
...Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group Hardware... ...Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems... ...and development of custom macro using
Physical design at HM level using Icc2/Innovus...
...Job Description
Job Description: We are looking for Sr. Physical Design Engineer with strong RTL2GDSii Skills. This role responsibilities include Logic Synthesis, Floor-planning, Place and Route, Timing Analysis, Convergence, IR/EM analysis, Formal verification, VC-LP, DRC...
...Notice Period: 0-15 Days
Job Description:
Minimum 3.5 years of relevant experience is required.
Working experience of Physical Design Implementation
Working experience of Physical Verification, Timing Signoff.
Good attitude to learn and deliver.
Work from...
...ROLE: Physical Design
Experience : 4 - 10 years
Tool Experience: Innovus is mandatory
Job Description:
Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks and signoff DRC/LVS closure.
Responsible for...
...Qualcomm India Private Limited
Job Area:
Engineering Group, Engineering Group Hardware... ...Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems... ...and development of custom macro using
Physical design at HM level using Icc2/Innovus...
...Hands-on experience in floor planning, placement optimizations, CTS and routing.
Hands-on experience in block/top level signoff STA, physical verification (DRC/LVS/ERC/antenna) checks and other reliability checks(IR/EM/Xtalk)
Exposure in physical implementation of timing/...
...customers in India and globally. With expertise in RTL Design, Integration, Verification, STA-Synthesis, Physical Design, and tapeout, NikSperri can execute complete... ...is a full-time on-site role as a Physical Design Engineer at NikSperri Technologies Private Limited, located...
Job Description: Job Profile:
• Need to have Basic understanding of DRM and need to translate that into
• Need to be Proficient in writing Cadence TechLEF and Synopsys TechFile
• Need to have knowledge on how to create Rapid MSOA kits.
• Need to have knowledge...
...Physical Desgn Lead- For a large Service / Solutions Organization Location: Bangalore
About the job
Role Description
As a full-time on-site role for a Lead Physical Design , you will be responsible for owning physical design implementation of complex designs for...
...LeadSoc Hiring for Physical Design- Engineer/leads
Experience-PD 5+ years
Location: Bangalore
Notice period: Immediate to 60days
Skills: PNR, Innovus, Icc2, lower nodes, low power.
Experience in block level/full chip/ to level
If interested, you can drop...
...Hi Folks,
Greetings from Tech Mahindra!!
Role: Physical Design Engineer
Exp-3-7 years
Location: Bangalore/ Kochi/ Ahemdabad/ Vizag
Job Description
RTL to GDS including, Synthesis + PNR
• Fusion compiler / Cadence flow (Innovus)
• Good understanding Macro...
...you are really interested please send me the Updated resume to this mail.
Company :ACL Digital
Company Website :
SR Physical design Engineer(PD) - ACL Digital - Europe based
Full–time
Job Location- Bangalore / Hyderabad
Exp.-4.5+yrs(Industrial experience...
...products in the space of Client, Graphics, Data Centre...etc.Analog Design Engineer is responsible for low power and reliable analog circuit... ...Competencies and Experiences: Deep understanding of Circuit design/ physical design of Analog Designs on advanced process technologies....
...Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group Hardware... ...Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems... ...this role has some expected minor physical activity, this should not deter otherwise...
...Position Description: Exp: 7- 12 Yrs
· Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM...
...Chennai and Bhubaneswar in India. Eximietas Design is a leading technology firm specializing... ...is fueled by the expertise of our engineering leadership team, drawn from industry giants... ...Broadcom, and Sun.
Title: Senior Physical Design Engineer
Experience : 4+ years...
...Exciting Opportunity for Senior Physical DesignEngineer
Are you a seasoned professional with over 3 years of experience in Physical Design? We're looking for a dynamic and skilled individual to join our team!
Key Qualifications:
RTL to GDS including, Synthesis +...
...A Fortune 100 Organization Senior Physical Design Engineer (Other Roles can be considered for exceptional candidates)
Hands-on Role. also mentor team members technically
Location: Bangalore
you will be responsible for the high-performance CPU implementation, and...
...Company:
Qualcomm India Private Limited
Job Area:
Engineering Group, Engineering Group Hardware Engineering
General Summary... ....
Job Description: Good knowledge on CMOS technology and physical design concepts on flooplanning, place and route , CTS, physical verification...
...Physical Design : 5 to 12 Years – Bangalore, Hyderabad, Ahmedabad, Noida
In Depth experience in Physical Design Implementation & Signoff at block level at 16/7nm technology nodes.
Good exposure in Floor planning, CTS, STA, Physical Verification, Basic understanding...
...violations at chip/block level for SoCs. Conducts timing rollups, designs for functionality, and develops performance and power optimized... ...to ensure highest quality of timing models that enable the physical design team to operate efficiently. Defines the right process, voltage...
...violations at chip/block level for SoCs. Conducts timing rollups, designs for functionality, and develops performance and power optimized... ...to ensure highest quality of timing models that enable the physical design team to operate efficiently. Defines the right process, voltage...
...Block integration (Including analog IP integration) and Physical Verification Signoff.
Engineer should have experience in handling chips of GHz clock... ...frequency range & multi-million instance.
Should have designed complex chips in lower technology nodes (16nm and below...
...Wipro Hiring
Principal / Staff / Sr. Staff Physical Design Engineers
Experience : Min 8-18 Years.
In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification...
...qualifications:
~ Bachelor's degree in Electrical Engineering or equivalent practical experience.
~3... ...in high-performance, high-frequency designs.
Preferred qualifications:
~... ...related field.
~4 years of experience in physical design, including clock/voltage domain...
...Job Description
Company:
Qualcomm India Private Limited
Job Area:
Engineering Group, Engineering Group Hardware Engineering
General Summary:
Physical design of block level with full understanding of PnR cycle.
Good understanding of Physical design fundamentals...
...information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
JR49377 Principal Physical Design Engineer
Responsibilities
As an individual contributor, delivers full chip/complex subsystem RTL2GDS hands-on.
Experience in...