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  •  ...- Work in collaboration with design team for addressing design challenges...  ...for all aspects of physical design and implementation of GPU...  ...Science, Electrical/Electronics Engineering, Engineering, or related field...  ...synthesis, place & route, CTS, timing convergence, layout closure.-... 
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    Full time

    5G-AI

    Hyderabad
    16 days ago
  •  ...Details Job Description: Performs timing analysis and timing optimization, generates, and...  ...level for SoCs. Conducts timing rollups, designs for functionality, and develops performance...  ...of timing models that enable the physical design team to operate efficiently. Defines... 
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    Full time
    Internship
    Local area
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    Intel Corporation

    Bangalore
    3 days ago
  •  ...solutions space, is looking for an experienced and talented Physical Design Engineer to take on a critical role with expansive responsibilities...  ...Design Automation (EDA) tools for both physical design and timing signoff with a focus on improving PPA (Performance, Power, Area... 
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    Full time

    Syntiant

    Bangalore
    more than 2 months ago
  •  ...Physical Design Engineer (4 Years Experience) Location: Kerala, India (preferred: Kochi, Trivandrum, Calicut or nearby regions) Employment Type: Full-time Experience Level: 4+ Years in VLSI Physical Design About the Role We are seeking a skilled Physical... 
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    Relocation

    HCLTech

    India
    10 days ago
  •  ...Impact Join Intel's cutting-edge Devices Development Group as a Physical Design Engineer, where you will play a pivotal role in shaping the future of...  ...as Synopsys and Cadence. - Conduct multiple power domain analysis using standard power formats like UPF or CPF. - Carry out... 
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    Hybrid work
    Local area
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    Intel

    Bangalore
    10 days ago
  •  ...Description: Do you want to engineer the future The ACE CPU team...  ...lives of every person. We are designing future generations of high-...  ...knowledgeable teammates: As TFM and PPA Physical Design Engineer in the CPU...  ...techniques. Performing analysis of either synthesis, place-... 
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    Full time
    Hybrid work
    Local area
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    Intel

    Bangalore
    17 days ago
  •  ...global semiconductor leader that bridges the physical and digital worlds to enable...  ...Role Overview: As a Senior Physical Design Engineer at Analog Devices, you will play a key role...  ...challenging floorplanning, place-and-route (PNR), timing closure, and physical verification... 
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    Permanent employment
    Full time
    Work at office
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    Analog Devices

    Bangalore
    2 days ago
  •  ...Impact Intel's Devices Development Group is seeking a talented Physical Design Engineer to join our team in shaping the future of computing and...  ...industry-standard EDA tools such as Synopsys or Cadence. - Perform static timing analysis constraint generation, timing closure, and... 
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    Local area
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    Intel Corporation

    Bangalore
    3 days ago
  •  ...Mandatory Experience in Full Chip Timing . Strong background in digital IC design , including floorplanning,...  ...place and route, timing closure, and physical design sign-off. Physical Design...  ..., clock tree synthesis (CTS), and static timing analysis (STA). Optimization... 
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    Full time
    Immediate start

    ACL Digital

    Bangalore
    2 days ago
  •  ...Block level floor planning, pre-wire and timing-optimization tasks Detailed place and route...  ...placement and routing, signal integrity analysis, and design for yield techniques Generation of detailed parasitic information Static and Dynamic rail analysis Signoff... 
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    BITSILICA

    Secunderabad
    1 day ago
  •  ...Physical Design Engineer Job Summary The Physical Design Engineer will be responsible for the full-chip and/or block-level physical implementation...  ..., and power grid planning). Power Rail/Grid Design and analysis (EM/IR Drop). Place and Route (Placement of standard... 
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    Permanent employment
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    Immediate start

    leadsoc technologies pvt ltd

    Bangalore
    2 days ago
  •  ...power planning, PNR and signoff checks Strong experience in static timing analysis (STA), timing closure, and signal integrity. Expertise in...  ..., Upf, including clock gating and multi-voltage domain design Proficiency in physical design tools, such as Synopsys ICC... 
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    Full time

    ACL Digital

    Bangalore
    2 days ago
  •  ...Meet the team You'll join the CAD Physical Design team within Cisco Silicon One, responsible for...  ..., place and route, power optimization, timing closure, and physical closure. Collaborate closely with multi-functional engineering teams to support and improve implementation... 
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    Cisco DevNet

    Bangalore
    5 days ago
  •  ...Job Description Physical Design Engineer - Texas Instruments About the Role: Join Texas Instruments' Connectivity engineering team as a Physical...  ...automations and improve design QoR Design Verification & Analysis Physical Verification: Execute and resolve DRC (Design... 
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    texas instruments india

    Bangalore
    2 days ago
  •  ...different. With over 25 years as an engineering services provider, we believe...  ...with MCMM Aware and Logical/Physical Aware Synthesis Strong...  ...and expertise in Low Power Designs, UPF/CPF Terminologies and Fundamentals...  ..., routing, and signoff (Static Timing Analysis, Formal... 
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    Quest Global

    Bangalore
    2 days ago
  •  ...have the opportunity to work on both the physical design and methodology for future designs of...  ...performance implementation. As a Principal Engineer, you will operate at the intersection of...  ...and route, clock tree synthesis, and timing closure. Serve as a key technical... 
    Permanent employment
    Local area
    Flexible hours

    Marvell Technology, Inc.

    Bangalore
    19 days ago
  •  ...Private Limited Job Area Engineering Group, Engineering Group...  ...Hardware Engineer, you will plan, design, optimize, verify, and test electronic...  ...~13 years of experience in physical design from product-based...  ...sign-off convergence, including Static Timing Analysis (STA) and sign... 

    Qualcomm

    Bangalore
    4 days ago
  •  ...Description Be part of the Renesas Memory Group, we are seeking a smart Junior Physical Design Engineer with strong expertise in RTL-to-GDSII implementation and experience working on complex STA timing closure. The role demands in-depth knowledge of industry-standard EDA tools... 
    Full time
    Hybrid work
    Work at office
    Remote job
    Worldwide
    Flexible hours
    2 days week

    Renesas Electronics

    Bangalore
    2 days ago
  •  ...us different. With over 25 years as an engineering services provider, we believe in the power...  ...Chip Lead to own and drive the entire physical design flow for SoCs. This role will be responsible...  ...Place-and-Route (PnR) execution through timing closure and sign-off. The ideal... 
    Full time

    Quest Global

    Bangalore
    2 days ago
  •  ...us different. With over 25 years as an engineering services provider, we believe in the power...  ...Responsibilities ~ They'll handle the physical design implementation for various partitions...  ...testability, floorplan, place and route, static timing analysis, and EMIR. ~ They'll also... 

    Quest Global

    Bangalore
    2 days ago
  •  ...placement guidelines, clock-tree synthesis, routing, timing optimizations). 2. Experience on hierarchical designs and/or Low Power implementation is an advantage...  ...reduction techniques. 5. Experience on Static Timing Analysis related activities , parasitic extractions, sign... 

    reyika

    Bangalore
    3 days ago
  •  ...staffing. With deep domain expertise, LatchQ delivers top-tier design verification solutions tailored for optimal outcomes....  .... Role Description We are seeking a full-time Senior VLSI Physical Design Engineer to join our on-site team in Bengaluru South. The role involves... 
    Full time

    latchq semiconductor pvt ltd

    Bangalore
    1 day ago
  •  ...with us. Ampere is a semiconductor design company for a new era, leading the...  ...you apply!  About The Role Our Physical Design Implementation Engineer will work with multi-functional global...  ..., Floorplan, Place and Route, Timing closure, IR/EM and DRC/LVS closure for... 
    Long term contract
    Work at office
    Local area

    Ampere

    Bangalore
    1 day ago
  •  ...India Pvt. Ltd. (Pune) Job Summary As a Senior Principal Physical Design Engineer, you will be a key technical leader responsible for driving...  ..., power planning, place and route, clock tree synthesis, static timing analysis (STA), formal verification, design rule checking... 

    NXP Semiconductors

    Pune
    24 days ago
  •  ...are seeking a highly experienced Principal PD Engineer for iMCU & Connectivity to lead and contribute to the physical design and implementation of complex, high-performance...  ..., mentoring junior engineers, and ensuring the timely delivery of cutting-edge products within NXP's... 

    NXP Semiconductors

    Bangalore
    25 days ago
  •  ...As a member of the Strategic Silicon Solution Group Full Chip Physical Design team, you will help bring to life cutting-edge designs. You...  ...Netlist, Tile/Block/Partition level Physical Design, Full Chip Static Timing Analysis and Constraints teams, to achieve first pass silicon... 
    Full time
    Worldwide

    AMD Ventures

    Bangalore
    2 days ago
  •  ...Summary We are seeking a highly experienced PDN Engineer for iMCU & Connectivity to lead and contribute to the physical design and implementation of complex, high-performance...  ..., mentoring junior engineers, and ensuring the timely delivery of cutting-edge products within NXP's... 

    NXP Semiconductors

    Bangalore
    10 days ago
  •  ...We're Hiring at ACL Digital! Position: Lead Physical Design engineer Experience: 8 to 10 Years Location: Bangalore Notice Period...  ...designs Physical verification (LVS/DRC) and fixing Timing closure using STA (Static Timing Analysis) EMIR and IR... 
    Full time
    Immediate start

    Wafer Space - An ACL Digital Company

    Bangalore
    2 days ago
  •  ...Job Summary The Digital Physical Design Engineer / Architect is responsible for a physical implementation of IP, Subsystem or IC design. The...  ...of design including floor planning, Placement, CTS, routing, timing convergence (STA) including related design ECO and physical... 

    Nxp Semiconductors

    Bangalore
    3 days ago
  •  ...data faster and safer, is seeking to hire an exceptional Lead Physical Design Engineer to join our MIC team in Bangalore. In this role, you will be...  ...Synthesis, Clock Distribution, IP integration, extraction, Timing closure, Power and Signal Integrity Analysis, Physical... 

    Rambus

    Bangalore
    1 day ago