Average salary: Rs420,000 /yearly
More statsSearch Results: 5 vacancies
...threaded applications.
Understanding complex systems and how to debug problems
Experience with debuggers such as GDB, and memory checkers such as Valgrind
Experience with Source Control Management (CVS, GiT, SVN)
Experience with unit testing and testing frameworks...
...This is what you are responsible for
Develop verification environments for modules, subsystems, top level and FPGA
Build models, checkers and random test frameworks using SystemVerilog and UVM
Participate in Low power analysis (UPF), power estimation, C modeling...
...in System Verilog HVL.
· Minimum 6 year of experience in OVM/UVM/VMM/Test Harness.
· Hands on experience of developing assertion, checkers, coverage and scenario creation.
· Must have executed at-least 2 to 3 SoC Verification projects
· Experience in developing test...
...experience in System Verilog HVL.- At-least 4 year of experience in OVM/UVM/VMM/Test Harness.- Hands on experience of developing assertion, checkers, coverage and scenario creation.- Must have executed at-least 1 SoC Verification project- Experience in developing test and coverage...
Rs 6 - 7 lakhs p.a.
...machines by using software and tebis with Fanuc and Siemens controlling system
Independent work on checking fixtures checking as a checker of programs, load distribution as a team leader
Problem-solving in programming
To Create CNC programming by using UG and TEBIS...
