ASIC Verification Engineer

ASIC Verification Engineer Job Description Template

Our company is looking for a ASIC Verification Engineer to join our team.


  • Develop Perl, Python and/or shell scripts to improve current verification infrastructure/methodology (5%);
  • Work closely with logic designers to resolve bugs and software developers to assist in software and bring-up development. (10%);
  • You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites;
  • Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%).


  • ASIC Verification using SystemVerilog;
  • Experience in constrained-random verification is a strong plus;
  • Perl/Tcl scripting is strongly preferred;
  • Experience with verification methodology like OVM/VMM/UVM;
  • MSEE or BSEE is required with at least 7 years of ASIC Verification Experience;
  • Strong problem solving and ASIC debugging skills;
  • Experience verifying networking protocols such as Ethernet is desirable.

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