Analog & Mixed-Signal Design Engineer (3 to 5 years of experience)

Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape.

Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.

Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.

Job Description

Will be part of team responsible for IO solutions for next generation SOCs in advanced CMOS technology nodes. Will work on IO solutions for SanDisk ASIC controllers under guidance of senior team members to meet the specifications and product requirements

Work closely with team and actively participate in technical discussions and reviews. Handle assigned tasks independently Pro-actively get design issues/problems solved. Contribute to or propose innovative design solutions and design methodologies.

Should have knowledge in IPs such as SSTL, LVDS, I2C, POD IOs, PVT calibration, HV tolerant and Fail-safe IOs, Crystal oscillator etc. Knowledge or relevant courses completed in TX and RX design architectures for high speed applications such as DDR4.

Added advantage to have is good understanding of ESD phenomenon, familiarity in ESD circuits design and associated ESD guidelines.

Conversant with tools such as Cadence Virtuoso/Synopsys custom compiler/Hspice/Spectre/Finesim including statistical simulation methodologies.

Experience in Mixed-mode simulation and analog/digital co-simulation will be of added advantage.

Experience in creating EDA model such as Verilog model, Liberty etc will be of added advantage.

Should have deep understanding and working knowledge of CMOS process including FINFET technologies such as 16nm and the associated DSM issues. 

Qualifications

• Masters degree in Electronics & Telecommunication/Electrical engineering.
• Very analytical in nature and able to work in a multi-disciplinary environment.
• Creative, out-of-the-box thinker with a high level of personal involvement 
• Strong theoretical background with a pragmatic approach.
• Good verbal and written communication skills and experience working with different geographies.
• Good documentation and presentation skills
• High level of integrity and commitment to quality and timeliness.

Additional Information

All your information will be kept confidential according to EEO guidelines.