Virtual Platforms -System C, TLM - Staff Engg

As a Software Virtual Platform Engineer, you will specialize in virtual platforms, including SystemC TLM and QEMU. Your primary focus will be on developing high-level system virtual models of complex SoC hardware. Key responsibilities include: Designing and developing SystemC TLM models to accurately represent SoC architectures. Integrating components such as processors, interconnects, peripherals, and custom IP blocks into the SystemC simulator. Collaborating closely with hardware designers, software engineers, and other stakeholders to understand system requirements and translate them into detailed SystemC models. Extensive experience with C++ programming to ensure efficient and effective model development. Top Preferred Skills 1. SystemC TLM or QEMU 2. Modern C++ 3. ARM Architecture (CPU, GIC, CoreSight Debug) 4. Firmware and/or Device Driver Development and Debug 5. Git Revision Control Technologies: Virtual Platform, SoC Architecture, CPU Firmware, Software Engineer Principal Duties and Responsibilities: Leverage advanced software/hardware systems knowledge and experience to design, develop, create, and modify virtual models. Define software requirements to develop complex SoC TLM models. Design and implement TLM models for complex, large-scale products and systems. Lead design, coding, and testing efforts to ensure that projects are completed to specifications and schedules. Perform code reviews and regression tests, as well as triage and fix issues to ensure the quality of code. Collaborate with individuals outside the software function (e.g., hardware, systems, and test engineers) to increase leverage and design solutions that work with other components of a specific project. Level of Responsibility: Work independently with minimal supervision. Make critical decisions that significantly impact program, product, or project success.