Quantum Error Correction Engineer (Hardware-Aware)

Role summary We are building a system that implements surface-code quantum error correction with a hardware-accelerated pipeline (multi-FPGA). We already have the FPGA architecture expertise in-house . This role is for a surface-code implementation specialist , someone who understands the surface code deeply and has practical experience with decoder implementations / syndrome-processing pipelines . You will be the person who makes the surface code “real” at the implementation level: clear algorithmic choices, concrete dataflows, executable reference models, and unambiguous specs that our FPGA team can implement and verify. What you’ll do Own the surface-code implementation plan (algorithm → implementation) Define the full syndrome processing + decoding workflow for the chosen surface-code setup Identify performance targets: cycle-level latency constraints, throughput requirements, scaling behavior Decoder strategy + practical implementation details Evaluate or define a decoder approach suitable for real-time/streaming constraints Provide implementation-ready descriptions (data structures, update rules, scheduling, approximations) Work with the FPGA architect on what belongs in FPGA vs host/control software Create implementation artifacts the FPGA team can execute Detailed algorithm spec (state machines, message formats, boundary conditions, corner cases) Reference implementation in Python/C++ (or similar) to generate expected outputs Test vectors + golden models for verification (including fault/noise model assumptions) Support integration + validation Debug mismatches between reference model and hardware behavior Define success metrics (logical error rate targets, latency budget, resource scaling) Must-have qualifications (non-negotiable) Deep working know