Sign up to access all features of our service
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

Validation/Verification (UVM, Coverage, Agentic), Staff Engineer

Synopsys Inc

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years in verification, closing coverage on complex IP and SoC designs, and you know that the hardest part is not writing the tests but knowing when you are actually done. You understand the difference between hitting a metric and truly verifying a design, and you have debugged enough corner cases to recognize when something does not add up, whether it came from a human or an AI.

You are curious about how AI can change verification work, not because it is trendy but because you have seen the manual grind of coverage closure and you want better tools. You do not blindly trust AI outputs. You validate them, push back when they miss the mark, and help refine the systems so they get smarter. You think of AI as a coworker you are training, not a magic box.

You care about knowledge quality. You have seen what happens when verification artifacts are poorly documented or inconsistently tagged, and you take ownership of making sure the information you create can actually be reused. At Synopsys, you will work on verification workflows that are being transformed by AI, and what you validate, curate, and teach will shape how the next generation of verification gets done.

What You'll Be Doing

  • Drive end-to-end verification closure on complex IP and SoC designs, including functional, code, and scenario coverage using UVM, SystemVerilog Assertions, and simulation tools like VCS and Verdi
  • Define coverage strategies, identify gaps, and use AI-assisted tools to accelerate test generation, debug, and convergence while independently validating all outputs for correctness
  • Collaborate with AI agents and tools for testbench generation, coverage analysis, debug assistance, and report generation, actively evaluating and refining what they produce
  • Own the quality and structure of verification artifacts, ensuring test plans, debug logs, and reports are well-tagged, contextualized, and consumable by AI systems
  • Provide structured feedback to AI and tool development teams to improve model accuracy, usability, and trustworthiness in verification workflows
  • Pilot and benchmark AI-based verification solutions, measuring their impact on productivity, quality, and coverage closure timelines
  • Contribute to building self-improving knowledge systems that evolve with verification data and enable scalable reuse across global teams

The Impact You Will Have

  • Accelerate coverage closure cycles and reduce time to signoff by integrating AI-assisted methodologies into verification workflows
  • Increase trust and adoption of AI tools across verification teams by validating outputs and demonstrating where they add real value
  • Improve the quality and completeness of verification outcomes through domain-driven insights and rigorous validation practices
  • Enable scalable, reusable knowledge systems that enhance organizational learning and reduce redundant work across projects
  • Help shape the transition to agentic, autonomous verification ecosystems by defining what good AI collaboration looks like in practice
  • Influence verification strategy and tooling decisions across Synopsys by benchmarking current practices against industry standards and emerging AI capabilities
  • Build a foundation for continuous improvement where verification data, feedback, and AI capabilities create a flywheel of increasing effectiveness

What You'll Need

  • Bachelor's degree in Electronics with 2+ years of verification experience, or Master's degree in Electronics with 1+ year of verification experience
  • Proven expertise in verification methodologies including UVM, simulation, and SystemVerilog Assertions, with a track record of driving coverage closure on complex designs
  • Strong understanding of digital design fundamentals using Verilog, VHDL, or SystemVerilog, and experience working in complex SoC or IP verification environments
  • Hands-on experience with EDA tools such as VCS and Verdi, and proficiency in scripting with Python, TCL, or UNIX-based workflows
  • Ability to critically evaluate AI-generated outputs, identify accuracy gaps and edge cases, and provide actionable feedback to improve AI systems
  • Experience or strong interest in AI/ML-assisted verification workflows, automation, and data-driven decision making is a plus
  • Strong debugging and analytical skills with the ability to work across global teams and communicate complex verification issues clearly

Who You Are

  • You take ownership of coverage closure and do not call something done until you have validated it from multiple angles, whether the output came from a simulation or an AI tool
  • You can look at an AI-generated test or summary, spot what it missed, and articulate exactly why it matters in terms a tool team or a manager can act on
  • You are detail-oriented with high standards for quality, and you get frustrated when verification artifacts are sloppy or inconsistent because you know it creates problems downstream
  • You are proactive about exploring new workflows and technologies, and comfortable working in environments where the tools and processes are still being figured out
  • You think like a knowledge builder, not just a task executor, always asking how the work you are doing today can make the next project easier
  • You are comfortable in a rapidly evolving, AI-first environment where the rules are not all written yet and your input will help shape what comes next

The Team You'll Be Part Of

Your recruiter will share more about the team structure and mission during the interview process.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Vacancy posted 6 days ago
Similar jobs that could be interesting for youBased on the Validation/Verification (UVM, Coverage, Agentic), Staff Engineer in Hyderabad vacancy
  • Overview: The Associate Staff System Verification Engineer designs, develops and implements advanced scripts to validate embedded software systems, analyze system performance and resolve issues through collaboration with the systems engineering and development teams.  This... 
    Suggested
    Worldwide
    Flexible hours

    Shure

    Hyderabad
    1 day ago
  •  ...Description We are seeking a Staff Mechanical (TPD) Engineer — an experienced E/MCAD engineer with...  ...cable-routing TPD — to lead creation, verification and automation of technical...  ...and cable-routing TPDs: author and validate harness drawings, cable routing details... 
    Suggested
    Remote job
    Full time
    Work at office
    Day shift
    Hyderabad
    a month ago
  •  ...~4–6 years in IP/Block/Subsystem verification ~ Strong expertise in SystemVerilog and UVM methodology ~ Experience building...  ...RTL debugging, assertions, and coverage analysis ~ Knowledge of AXI/AHB...  ...Requirements Design Verification Engineer | ASIC Verification Engineer (UVM... 
    Suggested

    Erbity Private Limited

    Hyderabad
    8 days ago
  •  ...government applications. Our engineers and space scientists are on a...  ...We are seeking a Senior FPGA Verification Engineer with 4–8 years of...  ...expertise in SystemVerilog and UVM, testbench architecture, and...  ..., assertions, and functional coverage Perform simulation-based... 
    Suggested
    Work at office

    AST SpaceMobile

    Hyderabad
    22 hours ago
  •  ...Description We are seeking a Senior Staff Engineer, Chip Implementation to help drive...  ...collaboration with RTL, DFT, physical design, verification, architecture, and package teams  ~...  ..., constraint development, constraint validation, and timing convergence  ~ Proven... 
    Suggested
    Full time
    Remote job
    Worldwide
    Flexible hours

    Renesas Electronics

    Hyderabad
    22 days ago
  • We are looking for an HW verification engineer who will be responsible for RTL verification, developing SV/UVM testbenches at Top/Sub-system/Block-levels. Also, responsible for...  ...designs. Verify and validate protocols such as Ethernet, PCIe, SPI, I2C,... 

    Luxoft

    Hyderabad
    a month ago
  •  ...are looking for an experienced Design Verification Engineer to join our semiconductor engineering...  ...candidate will have strong expertise in UVM (Universal Verification Methodology)...  ...closely with design, architecture, and validation teams to ensure high-quality silicon through... 
    Full time
    Weekday work

    Weekday AI

    Hyderabad
    1 day ago
  •  ...DESCRIPTION: We are seeking a Staff Engineer – Systems Design to lead the architecture...  ...decomposition, integration, and validation Collaborate with global teams across...  ...solutions Define and execute verification and validation strategies aligned... 
    Remote job
    Full time
    Hybrid work
    Work at office
    Working Monday to Friday
    Hyderabad
    a month ago
  •  ...for cancer. Position Summary We are seeking a Staff Systems Engineer to join a growing R&D team in Hyderabad supporting sustaining...  ...system-level input. Support system integration, verification, and validation activities. Help advance the team’s capabilities... 
    Remote job
    Full time
    Local area
    Hyderabad
    a month ago
  •  .... Role Purpose Summary: The "Sr. Staff Engineer, Electrical" is a member of a global R&...  ...review & approve the design documents and verification plan mapping to all the requirements...  ...Electrical requirements development and validation Hands on experience in analog,... 
    Remote job
    Full time
    Work at office
    Working Monday to Friday
    Hyderabad
    more than 2 months ago
  •  ...Overview :We are seeking a Senior FPGA Verification Engineer with 4 - 8 years of experience to design...  ...hands-on expertise in SystemVerilog and UVM, testbench architecture, and cross-functional...  ...scenarios, assertions, and functional coverage- Perform simulation-based verification... 
    Work at office

    AST SPACEMOBILE INDIA PRIVATE LIMITED

    Hyderabad
    22 days ago
  • Job Summary:The V&V Sr. Engineering Consultant role is responsible for end-to-end manual testing...  ...requirements traceability and test coverage- Collaborate with engineering teams and...  ...in database testing (SQL queries, data validation)- Good understanding of SDLC and testing... 

    Interface Consultancy Services

    Hyderabad
    12 days ago
  • Role : Senior ASIC Verification EngineerJoin an innovative semiconductor engineering team building next-generation AI and security infrastructure...  ...functional, system-level, and coverage-driven verification.- Build and maintain robust UVM verification environments.- Collaborate... 
    Work at office

    Green Arrow Career Services

    Hyderabad
    7 days ago
  •  ...Limited is looking for an experienced Design Verification Engineer to join our dynamic engineering team....  ..., including test reports and coverage analysis. Participate in design reviews...  ...Strong proficiency with SystemVerilog and UVM verification methodology. Solid understanding... 
    Work from home

    Erbity Private Limited

    Hyderabad
    1 day ago
  •  ...Patheon, and PPD. Position Summary We are seeking for Staff Engineer – Electron Micorscopy who has experiences in the field of electron...  ..., regulatory, and quality standards. Support product validation, testing, and certification activities Drive standardization... 
    Remote job
    Full time
    Work at office
    Working Monday to Friday
    Hyderabad
    a month ago
  •  ...cures for cancer. Position Summary We are seeking a Staff Electrical Engineer to join a growing R&D team in Hyderabad supporting...  ...Contribute to system requirements, interface definitions, and verification activities . Provide input to technology and product roadmap... 
    Remote job
    Full time
    Hyderabad
    a month ago
  •  ...Role : Lead Engineer-ECAD Librarian Location : Hyderabad Full/ Part-time : Full Time About Carrier Carrier Global Corporation...  ...Altium Designer. The role will be responsible for creating, validating, maintaining, and governing schematic symbols, PCB footprints,... 
    Full time
    Part time
    Flexible hours

    Carrier World

    Cyberabad
    1 day ago
  •  ...Company Description We're Nagarro. We are a digital product engineering company that is scaling in a big way! We build products, services, and experiences that inspire, excite, and delight. We work at scale — across all devices and digital mediums, and our people exist... 

    Nagarro

    Hyderabad
    a month ago
  •  ...operations. Fresh vision. Real impact. Come build it with us. Job Description Impact You Can Create As a Senior Staff Engineer , you will serve as a core technical anchor, driving the architectural evolution of Freshworks' multi-tier SaaS platform. In this... 
    Long term contract
    Full time

    Freshworks

    Hyderabad
    6 days ago
  •  ...Truechip is a leading provider of Verification IP (VIP) solutions, specializing...  ...verification methodologies and engineering excellence.Role Overview : As a...  ...insertion, to achieve high fault coverage for complex SoC designs.- Generate and validate ATPG patterns to ensure... 

    TRUECHIP

    Hyderabad
    5 days ago
  • Rs 7 - 25 lakhs p.a.

     ...talented and detail-oriented DFT Engineer with 3–8 years of experience...  ...key role in implementing and validating robust DFT architectures that...  ...high manufacturing test coverage, improved product quality, and...  ...closely with RTL designers, verification engineers, physical design teams... 
    Full time
    Weekday work

    Weekday AI

    Hyderabad
    1 day ago
  •  ...and Customer Experience (CX) operations. Fresh vision. Real impact. Come build it with us. Job Description As a Staff Systems Engineer, you will design, document and implement multi-tier software applications across databases, services and web layers. You... 
    Full time

    Freshworks

    Hyderabad
    22 days ago
  •  ...Senior DFT (Design-for-Test) Engineer is responsible for architecting, implementing, and validating test methodologies in complex...  ...functional collaboration across RTL, verification, and physical design teams....  ...Ensure highest stability and coverage of test patterns on ATE (... 

    Erbity Private Limited

    Hyderabad
    8 days ago
  •  ...skilled and detail-oriented DFT Engineer to join our semiconductor...  ...work closely with design, verification, physical design, and test engineering...  ...manufacturing quality, test coverage, and silicon reliability. You...  ...for implementing and validating DFT features while optimizing... 
    Full time
    Weekday work

    Weekday AI

    Hyderabad
    1 day ago
  •  ....com   THE ROLE: We are seeking a talented Full Stack AI Engineer to join our Workflow Automations team in Hyderabad. In this role...  ...predictive analytics relevant to financial services Develop agentic systems and intelligent agents, using N8N,Claude Cowork and other... 
    Hybrid work
    Local area
    Flexible hours

    Alter Domus

    Hyderabad
    1 day ago
  •  ...The position involves designing, developing and deploying UVM based Testbenches for multi-core, multi-threaded processor subsystems...  ...should have worked on architecture of chip-level testbenches and verification of SoCs and chipsets with ARM/RISC-V processor technology and AMBA... 
    Full time

    omnidesigntech

    Hyderabad
    a month ago
  • Position : AI Automation & Agentic Systems Engineer (Python)Location : Hyderabad (Work From Office)Experience : 512 YearsOpenings : 5Notice Period...  ...automation frameworks for UI, API, workflow, and system validation.- Develop AI-assisted automation solutions using LLMs and agentic... 
    Full time
    Work at office
    Immediate start

    Hawk Sense Business Solution pvt. ltd.

    Hyderabad
    16 days ago
  •  ...government applications. Our engineers and space scientists are on a...  ...responsible for verifying and validating the embedded software that...  ...Testing team and contribute to the verification and validation of flight...  ...counterparts to align on test coverage, software interface requirements... 
    Work at office
    Flexible hours

    AST SpaceMobile

    Hyderabad
    22 hours ago
  •  ...Category Engineering Hire Type Employee Job ID 15330 Remote Eligible...  .... We lead in chip design, verification, and IP integration,...  ...constraints development and validation, STA signoff, power analysis...  ...constraints, and mode/corner coverage. Run and analyze power... 
    Permanent employment
    Full time
    Remote job

    Synopsys Inc

    Hyderabad
    20 days ago
  •  ...Staff Engineer, Product Design and Engineering – Electrical What We Are Looking For We are looking for passionate, curious, and innovation-oriented electrical engineers who embrace our ambitious mission to develop low-to-zero carbon power plant solutions and to drive... 
    Worldwide
    Flexible hours

    Baker Hughes

    Hyderabad
    1 day ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to Validation/Verification (UVM, Coverage, Agentic), Staff Engineer. Be the first to apply!